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Nandita DasGupta
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Nandita DasGupta
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Nandita DasGupta
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DasGupta, N.
Basu, Nandita
Basu, N.
Dasgupta, N.
DasGupta, Nandita
Gupta, Nandita Das
Dasgupta, Nandita
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5 results
Now showing 1 - 5 of 5
- PublicationEffect of GaN cap layer on the performance of AlInN/GaN-based HEMTs(01-04-2022)
;Sarkar, Sujan ;Khade, Ramdas P.; The effect of the GaN cap layer on the performance of AlInN/GaN-based HEMTs has been studied. Detailed analysis of the DC characteristics reveals that the addition of the GaN cap layer reduces the gate leakage current and increases the saturation drain current of HEMT. We have observed a slight increase in the two-dimensional electron gas density on the addition of the GaN cap layer. The addition of the GaN cap layer shifts the threshold voltage towards the negative direction, reduces the off-state drain leakage current, improves subthreshold swing, and enhances the ION/IOFF ratio of HEMT. The TCAD simulation shows that the addition of the GaN cap layer reduces the peak electric field at the drain side edge of the gate and improves the breakdown voltage. From the double pulsed ID-VDS measurement, we have found that the presence of the GaN cap layer reduces the current collapse due to gate-lag and drain-lag by passivating the surface traps of the access regions. Although there is a slight reduction in transconductance, the current gain cut-off frequency (fT) of the HEMT with GaN cap is higher than the HEMT without GaN cap. - PublicationAn analytical charge control model for AlGaN/GaN HEMT including the gate bias dependence on polarization charge(01-01-2012)
;Karumuri, Naveen ;Sreenidhi, T.; A closed form analytical expression for the 2DEG (channel charge) in AlGaN/GaN HEMT is presented. This includes the effect of transverse electric field on the piezoelectric bound charge due to electromechanical coupling. The present model explains the dependence of bound piezoelectric charge and channel 2DEG concentration on gate bias. Models with and without electromechanical coupling are compared and explained. © 2012 IEEE. - PublicationA Simple Technique to Estimate Surface Traps from DC Transfer Characteristics of GaN-Based HEMT(01-01-2021)
;Sarkar, Sujan ;Khade, Ramdas P.; This paper proposes a simple technique to estimate the surface traps in GaN-based HEMTs by applying a negative gate bias stress. The transfer characteristics of HEMTs were measured for drain voltages (VDS) varying from 2V to 10V in steps of 2V with gate bias stress of -8V. The stress time of the measurement was varied from Os to 300s in steps of 60s. For a particular VDS, as the stress time was increased, the off-state drain leakage current changed due to surface traps. Two different samples were characterized. In one sample with a significant amount of surface traps, the off-state drain leakage current de-creased with the stress time. In another sample with a negligible amount of surface traps, the off-state drain leakage current remained nearly constant. This simple measurement technique can identify surface traps present in GaN-based HEMTs. The results were corroborated through estimation of surface traps with special test structures. - PublicationSuppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing(01-01-2023)
;Sarkar, Sujan ;Khade, Ramdas P. ;Shanbhag, Ajay; In this paper, we report the effect of post-gate metallization annealing on the performance of GaN-based High Electron Mobility Transistors (HEMTs). The performances of HEMTs annealed at 200 °C (HEMT1) and at 400 °C (HEMT2) for 5 minutes in N2 ambient are compared. While there is a kink in the output characteristics of HEMT1, there is no such kink in the output characteristics of HEMT2. The kink is attributed to impact ionization in the GaN channel. Surface and interface traps of HEMT1 increase the peak electric field at the drain side gate edge and cause impact ionization. The post-gate metallization annealing at a higher temperature reduces the surface and interface traps, which reduces the peak electric field in HEMT2 and suppresses impact ionization. This is substantiated by TCAD simulations. Threshold voltage instability on the application of negative gate bias stress was also examined for these devices. A positive shift in threshold voltage was observed in HEMT1 on the application of negative gate bias stress, whereas the corresponding shift was negative in HEMT2, indicating the presence of two different types of traps in HEMT1 and HEMT2. - PublicationAlInN/GaN MIS-HEMTs with High Pressure Oxidized Aluminium as Gate Dielectric(04-10-2018)
;Kanaga, Srikanth ;Kushwah, Bhuvnesh ;Dutta, Gourab; AlInN/GaN metal insulator semiconductor high electron mobility transistor (MIS-HEMT) with high pressure oxidized aluminium as gate dielectric is investigated in this paper. The fabricated MIS-HEMT shows more than six orders of reduction in the gate leakage current in reverse bias and more than three orders of reduction in forward bias compared to the reference HEMT devices also fabricated on same substrates. A maximum drain current of 750 mA/mm was achieved due to improvement in the gate swing for MIS-HEMT. The MIS-HEMT devices also showed good improvement in the subthreshold slope and ID,ON/ID,OFF ratio compared to HEMT devices.