K Sridharan

We present a hardware-directed robotic exploration algorithm for an indoor environment in this paper. The robot is equipped with eight ultrasonic sensors. The algorithm has optimal (linear) time complexity. An important feature of the algorithm is the acquisition of distance information by the eight sensors in parallel. A novel architecture based on Content Addressable Memory (CAM) has been developed. An FPGA implementation has also been developed. Experiments with an FPGA-based robot have been successfully conducted for exploration of static as well as dynamic environments. © 2008 IEEE.

We consider the problem of finding a feasible path for a mobile robot from one point to another that avoids collisions with objects (obstacles) in the environment. We assume that the robot is equipped only with a field programmable gate array device (for processing) and present an algorithm for this problem. We also present an area-efficient architecture. One element of the architecture is the Coordinate Rotation Digital Computer (CORDIC) to facilitate rotation of the robot. Some experiments are also presented. © 2012 IEEE.

Autonomous robotic navigation and mapping have been of tremendous interest during the last decade. While several approaches have been presented, little is known about performing these tasks when constraints are placed on the processing resources and sensors. This paper studies the effectiveness in performing a few high level tasks when a mobile robot is equipped merely with a low-end microcontroller and four ultrasonic sensors. It is shown that the data memory on the microcontroller plays a crucial role in map construction of indoor environment. Four sensors are shown to be adequate for good quality map construction and for following a wall reasonably well. Experiments on map construction and wall following in an indoor environment using a mobile robot equipped with merely an Atmel 89C52 (and no external memory) are presented. © 2009 IEEE.

This paper presents a new VLSI-efficient algorithm for robotic exploration in a dynamic environment where the geometry of the objects or their motion trajectories are not known a priori. The input to the proposed algorithm is a list of G nodes obtained using the robot's step size and the dimensions of the environment. P nodes accessible to the robot are identified. The time complexity of the proposed algorithm is O(G). Special features of the algorithm include parallel processing of data from multiple ultrasonic sensors and the use of associative memory to efficiently keep track of the visited terrain nodes. A novel architecture based on selective shutdown of hardware modules for reducing energy consumption is proposed. Detailed experiments with a mobile robot fabricated locally with a Xilinx XC2S200E field programmable gate array and eight ultrasonic sensors on-board validate the efficacy of the proposed approach.

This paper presents a hardware-efficient scheme to construct sensor-based Generalized Voronoi Diagram (GVD) of an indoor environment. An architecture to construct the GVD using a prediction and correction strategy is presented. The approach is based on processing distance information from ultrasonic sensors. A feature of the proposed approach is that it does not involve operations that are expensive in hardware. Results of FPGA implementation are also presented. The design is shown to be space efficient and fits in a low-end FPGA device (with a small number of system gates). © 2007 IEEE.

Sensor-based construction of different geometric structures has been an important development in the domain of autonomous robot navigation. This paper presents a hardware-efficient scheme to construct one such geometric structure, namely, the generalized Voronoi diagram (GVD), using a prediction-and-correction strategy. In this paper, an architecture to construct the GVD for an indoor environment with multiple obstacles whose geometry and location are not known beforehand is presented. A feature of the proposed approach is that it does not involve operations that are expensive in hardware. Furthermore, no explicit angle computation circuitry is needed. An efficient architecture based on hardware reuse is presented. The design is shown to be space efficient and fits in a low-end field-programmable gate-array (FPGA) device (with a small number of system gates). Detailed experiments with a mobile robot fabricated locally with a Xilinx XC2S200E FPGA and eight ultrasonic sensors onboard validate the efficacy of the proposed approach for static as well as dynamic environments. © 2008 IEEE.