Anjan Chakravorty

Detailed formulations for DC and AC emitter current crowding are presented in view of developing an extended π-equivalent circuit (EC) model to accurately predict the lateral non-quasi-static effects in silicon germanium heterojunction bipolar transistors. Under negligible DC current crowding, the EC reduces to a simple π-model. The implementation-suitable versions of the models are also developed. Compared to state-of-the-art model formulations, the extended π-model shows better accuracy in predicting device simulated data. If desired, the high level of accuracy obtained by the extended π-model can be traded with the required extra simulation time due to one extra node.

In this paper, we present extensive random telegraph signal (RTS) noise characterization in advanced SiGe:C heterojunction bipolar transistors. In frequency domain, in addition to 1/f noise, generation-recombination (G-R) mechanisms are observed at low base bias in the base noise. Their existence is confirmed by RTS noise measurements in time domain. The RTS amplitude evolves rather slowly with bias, indicating their mechanism to have originated in peripheral locations. In the collector side, on the onset of high-current effects, distinct RTS noise is observed that possibly originates from the traps in the trench regions. Extraction of time constants from RTS noise and their bias dependence are presented that provides estimation of trap location within the device structure.

A modified physics-based two-section model is proposed to accurately capture the lateral non-quasi-static effect in SiGe HBTs. A methodology is proposed to include the DC emitter current crowding effect in the existing two-section model framework. The proposed two-section model is implemented in Verilog-A. The large-signal transient and the small-signal AC simulations are carried out and the results are compared with the numerical device simulation data. The proposed model is observed to perform better than the existing two-section model and the state-of-the-art standard model from the perspectives of small-signal frequency-domain characteristics and large-signal transients.

In this paper for the first time, a frequency independent equivalent circuit model is proposed for series stacked inductors having variable width and space (taper) across their turns. The proposed model accounts for the increase in mutual inductance between the stacked spirals due to taper. Also, the proximity effect losses with tapered top and bottom spirals of the series stack is accurately modeled. Finally, the inter-layer capacitance between the stacked spirals which dictates the self-resonant-frequency of the series inductor is calculated across different values of taper. EM simulations and measurements show excellent correlation with model simulations across different layouts with different values of taper thereby demonstrating the scalability of the proposed model.

In this paper, we have assessed the RF measurements of SiGe HBTs upto 500 GHz using TCAD simulation for the first time. In order to bring confidence in simulation, the device geometries and doping profiles are captured in the simulation deck. Then all the basic DC and RF properties are calibrated with the measured data for two different geometries. Additionally the simulated unilateral gain and small signal current gain are also brought in agreement with the corresponding measured data at different bias voltages for both the devices. Finally bias and frequency dependent S- parameter measurements are compared with the TCAD simulation and resulting issues are discussed.

This paper shows that the minority charge partitioning effect in silicon germanium heterojunction bipolar transistors exists even in the low-frequency quasi-static regime. The charge partitioning factor is extracted using the new equivalent circuit model from numerically simulated data for a one-dimensional transistor structure. A comprehensive bias-dependent model is developed using full regional approach coupled with the transient integral charge control theory. The model predicts the bias-dependent low-frequency y 21-parameters with excellent accuracy. © 2012 IEEE.

The undesired behavior of the substrate significantly affects the output impedance of the device; hence degrades circuit performance mainly in the high frequency regime. Therefore, for high-speed and RF circuits, collector-substrate modeling has to be sufficiently accurate. In this paper, an improved collector-substrate equivalent circuit model is proposed. The circuit model elements are physics based and are calculated from technological data. The validity of the equivalent circuit has been verified by on-wafer measurements of an SiGe HBT fabricated in B55 technology up to 330 GHz, the highest frequency reported so far for collector-substrate modeling. The proposed substrate network can be considered as an extension of the latest large-signal HICUM model (L2v2.4).

A compact model for silicon germanium heterojunction bipolar transistor based on transient integral charge-control (TICC) relations is presented. Partitioning factors are extracted from the numerically simulated data. A thorough analysis based on the transient and AC results has been carried out for checking the suitability of the model. No convergence problem is observed in transient simulation. The model shows acceptable accuracy in the phase behavior from low frequency up to transit frequency.

Due to rapid urbanization, the existing water distribution networks need to be expanded by adding sub-networks for the newly developed areas. The stochastic nature of demands requires several simulations of the full network for optimum design and cost minimization. The size of the simulation problem thus becomes complex and computationally expensive. The reduced models can be handy for designing and optimizing such networks. This paper describes the usage of equivalent electrical circuit theory to reduce a large water distribution network for focussed analysis of a sub-network. Two methodologies are proposed to obtain the equivalent network using linear and nonlinear forms of the Thevenin theorem. Unlike other network reduction methods, the reduced equivalent networks derived from these methodologies have only two elements, such as a reservoir and an equivalent pipe for the existing network. In the first method, the nonlinear pipe network is replaced and implemented with its analogous linear electrical network in a circuit simulator for finding open circuit voltage and short circuit current at the desired node and branch. The equivalent pipe network parameters are estimated using these values. In the second method, the equivalent network parameters are extracted by ffitting the driving point headloss characteristics at the desired node with a suitable headloss formula. Applicability and comparison of the proposed network reduction methodologies are demonstrated on a realistic water distribution network connected with a sub-network. The simulated results of the reduced networks are compared with the solutions of the original nonlinear network. The reduced network obtained from the second method is found to yield more accurate results than the first method when the driving point headloss characteristic curve is fitted accurately. The reduced networks can be solved in much less computation cost than the original network. Therefore, the proposed network reduction methodologies are beneficial for analyzing a focused part, i.e. sub-network, of a large pipe network with stochastic demands in much less computational effort.

The on-chip planar spiral inductors having variable width (W) and spacing (S) across their turns are known to exhibit higher quality factors (Q). In this paper, we present an efficient parameterized cell (pcell) design in cadence using SKILL scripts for automatic layout generation of these complex, high-Q, variable W&S spiral inductors comprising of single ended and symmetric structures with rectangular, hexagonal, octagonal and circular spirals. Electromagnetic simulations are performed on the inductor layouts generated using the developed pcells. The constant W&S and variable W&S spiral inductor structures are fabricated in a 0.18 μm silicon on insulator process. Measurements show ∼25% improvement in the quality factor of variable W%S spiral inductors compared to their constant W&S counterparts and also validates the proper operation of the developed inductor parameterized cells. The presented variable W&S inductor pcell significantly reduces the layout design time of RF circuit designers and also helps in the design automation of these complex inductor structures to boost their own performance and the RF circuits as well.