Anjan Chakravorty

A modified physics-based two-section model is proposed to accurately capture the lateral non-quasi-static effect in SiGe HBTs. A methodology is proposed to include the DC emitter current crowding effect in the existing two-section model framework. The proposed two-section model is implemented in Verilog-A. The large-signal transient and the small-signal AC simulations are carried out and the results are compared with the numerical device simulation data. The proposed model is observed to perform better than the existing two-section model and the state-of-the-art standard model from the perspectives of small-signal frequency-domain characteristics and large-signal transients.

The reliability of high-speed SiGe:C HBT under electrical stress close to the Safe Operating Area (SOA) limit is analyzed and modeled. A long time stress test, up to 1000 h, is performed at bias conditions chosen according to applications targeted for these transistors. During the aging tests, Gummel plots are measured at fixed time to analyze the evolution of base and collector current. At low level injection, we observed an increase of the base current whereas the collector current remains constant for the whole Vbe range and during the 1000 h aging time. By means of 2D TCAD simulations, this evolution of base current is attributed to trap activity at the emitter-base junction periphery. Based on TCAD simulation results, we propose an aging law using a differential equation that has been implemented in HiCUM L2 v2.33. This reliability-aware compact model allows designers creating reliability-aware circuit architectures at an early stage of the design procedure, well before real circuits are actually fabricated.

Development of scalable, low-power resistive memory devices (ReRAM) can be crucial for energy efficient neural networks with enhanced compute-in-memory capability. Recent demonstrations show promise for graphene as an electrode material for ultra-low power switching in ReRAMs. However, a limited amount of research has been carried out towards developing a SPICE-based compact model that captures the switching dynamics of such devices. In this work, we investigate a low-power, forming-free resistive memory device with graphene electrodes and a multi-layered TiOx/Al2O3/TiO2 dielectric stack. We first develop a compact model to demonstrate that the switching dynamics can be simulated by considering permanent conductive filaments in the TiOx and TiO2 layers and by the modulation of a tunnelling gap within the Al2O3 layer. The developed devices also exhibit strong rectification behavior in the ON state. We incorporate this rectification behavior in the developed compact model. We also demonstrate that multiple filaments govern the switching dynamics at higher operating current values. The developed model also accurately captures the stochastic variability experimentally observed in the ReRAM devices. This work shows promise for simulation of large-scale networks of graphene-based low-power ReRAM technology.

From the perspectives of characterized data, calibrated TCAD simulations and compact modeling, we present a deeper investigation of the very high frequency behavior of state-of-the-art sub-THz silicon germanium heterojunction bipolar transistors (SiGe HBTs) fabricated with 55-nm BiC-MOS process technology from STMicroelectronics. The TCAD simulation platform is appropriately calibrated with the measurements in order to aid the extraction of a few selected high-frequency (HF) parameters of the state-of-the-art compact model HICUM, which are otherwise difficult to extract from traditionally prepared test-structures. Physics-based strategies of extracting the HF parameters are elaborately presented followed by a sensitivity study to see the effects of the variations of HF parameters on certain frequency-dependent characteristics until 500 GHz. Finally, the deployed HICUM model is evaluated against the measured s-parameters of the investigated SiGe HBT until 500 GHz.

A physics-based compact model for silicon-on-insulator lateral double-diffused metal-oxide-semiconductor transistors including impact ionization, subsequent snapback (SB), and self-heating (SH) is presented. It is observed that the SB effect is caused by the turn-on of the associated parasitic bipolar transistor. The model includes the effect of device SH using resistive thermal networks for each region. Comparisons of modeling results with device simulation data show that, over a wide range of bias voltages, the model exhibits excellent accuracy without any convergence problem. © 2011 IEEE.

Abstract A new orthogonalization scheme is suggested for implementing correlated noise of bipolar transistors. The scheme provides a necessary condition on the non-quasi-static (NQS) models that can be used to obtain an implementation-suitable correlated noise model. One of the solutions presented here corresponds to a single node realization not reported so far. The ^gm-factor is introduced in the noise analysis explaining the deviations of a former noise model from device simulations. The model is extended to include the collector space-charge-region induced noise by retaining the simplicity of the realization and preserving the model parameter count.

This paper presents a physics-based compact dc model for high voltage silicon on insulator lateral double diffused MOS (SOI-LDMOS) transistor, assuming uniform doping for the channel. It uses MM20 model for the channel and drift region under the thin gate oxide, and proposes a new model for the drift region under the field oxide. This model shows that the current at higher gate voltages in SOI-LDMOS, is limited by the velocity saturation in the drift region under the field oxide, which determines the device behavior in the quasi-saturation region. The model exhibits high level of accuracy over wide bias ranges. ©2009 IEEE.

Effects of the back-end-of-line layers up to metal-1 on the self-heating and thermal coupling in a multi-finger silicon germanium heterojunction bipolar transistor (SiGe MFT) are investigated. It is observed that the rise in junction temperature is overestimated if the BEOL effects are not considered. A new method for estimating the thermal coupling coefficients is proposed emulating the real operating condition. The proposed methodology demonstrates that the thermal coupling is increased in real operating condition and the estimated coupling coefficients are almost independent of the dissipated power. Further an empirical closed-form formulation is proposed for estimating the coupling coefficients analytically and for subsequently using in compact model simulation. The formulation is found to predict the coefficients quite accurately. Compact model simulations using the analytically obtained coupling coefficients show excellent model agreement with the static and dynamic 3D TCAD simulation data for junction temperature. Finally the model is validated against the measured data corresponding to an SiGe MFT fabricated using B55 technology from ST microelectronics.