Anjan Chakravorty

Detailed formulations for DC and AC emitter current crowding are presented in view of developing an extended π-equivalent circuit (EC) model to accurately predict the lateral non-quasi-static effects in silicon germanium heterojunction bipolar transistors. Under negligible DC current crowding, the EC reduces to a simple π-model. The implementation-suitable versions of the models are also developed. Compared to state-of-the-art model formulations, the extended π-model shows better accuracy in predicting device simulated data. If desired, the high level of accuracy obtained by the extended π-model can be traded with the required extra simulation time due to one extra node.

In this paper, we present extensive random telegraph signal (RTS) noise characterization in advanced SiGe:C heterojunction bipolar transistors. In frequency domain, in addition to 1/f noise, generation-recombination (G-R) mechanisms are observed at low base bias in the base noise. Their existence is confirmed by RTS noise measurements in time domain. The RTS amplitude evolves rather slowly with bias, indicating their mechanism to have originated in peripheral locations. In the collector side, on the onset of high-current effects, distinct RTS noise is observed that possibly originates from the traps in the trench regions. Extraction of time constants from RTS noise and their bias dependence are presented that provides estimation of trap location within the device structure.

In this paper, we present extensive random telegraph signal (RTS) noise characterization in SiGe heterojunction bipolar transistors. RTS noise, observed at the base, originates at the emitter periphery while at the collector side distinct RTS noise is observed at high-injection that originates from the traps in the shallow trench regions. Time constants extracted from RTS during aging tests allow understanding of trap dynamics and new defect formation within the device structure. This paper provides the first demonstration of RTS measurements during accelerated aging tests to study and understand generation of defects under bias stress in SiGe HBTs operating at the limit of their safe-operating area.

This paper investigates alternative topologies of silicon germanium heterojunction bipolar transistors designed and fabricated in the state-of-the-art BiCMOS process from STMicroelectronics for improved safe-operating characteristics. Electrical and thermal behaviors of various structures are analyzed and compared, along with a detailed discussion on drawbacks and advantages. The test structures under study are different in terms of emitter-finger layouts as well as the metal stacks in the back-end-of-line. It is observed that the multifinger transistor structures having nonuniform finger lengths with wider area enclosed by the deep trench and higher metallization stacks yield an improved thermal behavior. Therefore, the safe-operating area of multifinger transistors can be extended without degrading the RF performances.

In this paper, we develop a correlated noise model for bipolar transistors from an accurate nonquasi-static model. The proposed noise model includes the signal delay through base-collector space-charge region and is implemented using four extra nodes. We also present a simplified version of the same model that requires only two extra nodes. A further simplified version that uses only one extra node is found to be identical with a state-of-the-art correlated noise model. When compared with the device simulation data, our proposed models show improved accuracy compared with the existing state-of-the-art noise models.

In this paper for the first time, a frequency independent equivalent circuit model is proposed for series stacked inductors having variable width and space (taper) across their turns. The proposed model accounts for the increase in mutual inductance between the stacked spirals due to taper. Also, the proximity effect losses with tapered top and bottom spirals of the series stack is accurately modeled. Finally, the inter-layer capacitance between the stacked spirals which dictates the self-resonant-frequency of the series inductor is calculated across different values of taper. EM simulations and measurements show excellent correlation with model simulations across different layouts with different values of taper thereby demonstrating the scalability of the proposed model.

In this paper, we present extensive characterization of low-frequency noise in advanced silicon germanium heterojunction bipolar transistors. We demonstrate the extraction methodology of base and collector noise spectral densities for a wide range of transistor geometries. In addition to 1/f noise, generation-recombination (G-R) mechanisms are observed at low bias in the base current noise. Their existence is confirmed by Random Telegraph Signal (RTS) noise measurements. 1/f and G-R components are extracted from the base current noise spectra and their bias dependencies are studied. Finally, base current noise spectral densities measured at the same base current density in different geometries are compared to study the individual contribution of 1/f noise from the periphery as well as the intrinsic device. Part II of this paper will discuss the modeling aspects and noise correlation.

In this paper, we present the operation principle of an organic metal-insulator-semiconductor (MIS) capacitor where the organic semiconductor is undoped. In spite of a low charge concentration within the semiconductor, this device exhibits a capacitance variation with respect to the applied gate voltage yielding the capacitance-voltage characteristics similar to that of a traditional MIS capacitor based on the doped semiconductor. A physics-based model is developed to derive the charge concentration, surface potential, and the capacitance of the organic MIS capacitor. The model is validated with TCAD simulation results as well as with experimental data obtained from the fabricated organic MIS capacitor consisting of poly(4-vinylphenol) and poly(3-hexylthiophene-2, 5-diyl) as an insulator and a semiconductor, respectively.

In this paper, we report an accurate quasi-saturation model and a nodal charge model for silicon-on-insulator lateral double-diffused metal-oxide-semiconductor (SOI-LDMOS) transistors. First, a model of a 2-D SOI resistor under velocity saturation is developed, which is subsequently incorporated into the drift region of an LDMOS transistor to predict the quasi-saturation effect. The gate-voltage dependence of the quasi-saturation current is also modeled. Second, we propose a new nodal charge model to describe the dynamic behavior of the device. Comparisons of modeling results with device simulation data show that the proposed model is accurate over a wide range of bias. Scalability of the model with respect to the length of the drift region under the field oxide is also demonstrated. Finally, the model is validated under device self-heating conditions and by comparing it with the experimental data.

In this paper, we have assessed the RF measurements of SiGe HBTs upto 500 GHz using TCAD simulation for the first time. In order to bring confidence in simulation, the device geometries and doping profiles are captured in the simulation deck. Then all the basic DC and RF properties are calibrated with the measured data for two different geometries. Additionally the simulated unilateral gain and small signal current gain are also brought in agreement with the corresponding measured data at different bias voltages for both the devices. Finally bias and frequency dependent S- parameter measurements are compared with the TCAD simulation and resulting issues are discussed.