Veezhinathan Kamakoti

This paper proposes a new CLB architecture for FPGAs and an associated testing technique that detects routing errors caused by SEUs in the SRAM configuration memory of the FPGA. The proposed testing technique detects all possible routing errors including bridging faults, and requires a single configuration of only the LUTs of the FPGA. Any routing error that affects the logic of the circuit is detected by the proposed technique in a maximum of 8 clock cycles. It is noteworthy that the time required for error detection is independent of both the number of switch matrices and the number of logic blocks in the FPGA. © 2005 IEEE.

This paper establishes a handshake between the fields of "parallel genetic algorithms" and reconfigurable systems, to provide a solution for the routing problem for FPGAs, that attempts to enhance the performance of the circuit implemented by the FPGA. We propose to solve the problem of routing for FPGAs in three phases, out of which the first two utilize the concept of genetic algorithms to transform an initial population of random suggested routings to a population that contains solutions approximating the optimal one.

This paper proposes a new CLB architecture for FPGAs that can detect and correct Single Event Upset (SEU) faults in the LUTs. A methodology for mapping logical functions onto the LUTs is presented that exploits the features of the proposed CLB architecture to detect and correct the SEU faults in the LUTs. Experimental results obtained by mapping standard benchmark circuits on the proposed architecture indicate that on an average, 96% of the SEU in the LUTs can be detected without employing any redundancy. Further, by using Duplication with Comparison (DWC) techniques it is shown that 100% of the SEU in the LUTs can be detected for any circuit that is mapped on the proposed architecture; and for the benchmark circuits, on an average, 96% of the SEU in the LUTs can be automatically (without any user intervention or reconfiguration) corrected. © 2004 IEEE.