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Compensating for quantizer delay in excess of one clock cycle in continuous-time ΔΣ modulators
Date Issued
01-01-2010
Author(s)
Abstract
The maximum sampling rate of a continuous-time ΔΣ modulator is limited by quantizer delay. Most conventional delay compensation techniques address less than a clock cycle of delay. A technique previously proposed for compensating quantizer delays in excess of a clock cycle in bandpass modulators involves a parallel feedback path that bypasses the quantizer. We analyze this technique for low-pass modulators and show that sampling rates hitherto not possible can be achieved. Design tradeoffs are investigated, and simulation results showing the effectiveness of the technique are given. © 2010 IEEE.
Volume
57