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A unified model for gate capacitance-voltage characteristics and extraction of parameters of Si/SiGe heterostructure pMOSFETs
Date Issued
01-08-2007
Author(s)
Bindu, B.
Indian Institute of Technology, Madras
Indian Institute of Technology, Madras
Abstract
A unified model for gate capacitance-voltage characteristics of Si/SiGe heterostructure pMOSFETs is presented. This model is applicable to buried-channel, surface-channel, and dual-channel Si/SiGe heterostructure pMOSFETs. The results from the model are compared with the experimental results and are found to be in excellent agreement. A simple and accurate method for the extraction of parameters such as the valence band offset, Si cap layer thickness, threshold voltages, and substrate doping is also presented in this paper. © 2007 IEEE.
Volume
54