Publication: A microprocessor-based scheme for deriving sampling frequency
Date
01-01-1992
Authors
Jagadeesh Kumar Varadarajan
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Abstract
A scheme using the counter-timer 8253 in a microprocessor environment is described for deriving a synchronized time signal, whose frequency is an integral multiple of a given reference. Conventional PLL and associated circuitry are dispensed with. Errors arising out of the use of finite clock frequency and computational bit length are quantified. The scheme is also suitable for micro-controller-based applications. © 1992.
Description
Keywords
8253 timer-counter, digital PLL, frequency measurement, frequency multiplication, Sampling frequency