Design considerations for low-distortion filter and oscillator ICs for testing high-resolution ADCs

Low distortion filters and oscillators that are useful for testing high-resolution ADCs are demonstrated in a 0.6 μm CMOS process. Band-pass filter prototypes with center frequencies of 1 and 10 kHz have 60 dB attenuation at the second harmonic, THD < -115 dBc while driving 10 Vppd output, and 44 μV rms output noise. The oscillator prototype can generate 1 or 10 kHz and has THD < -115 dBc while driving 8 Vppd output. Distortion generation mechanisms in the filter and oscillator are analyzed. The nonlinearity of the output stage of the opamp used in the active filter coupled with the capacitance at the input of that stage is shown to be the main cause of nonlinearity. This is suppressed using a buffer between the first and the second stage of the opamp. The modulation of the oscillator's loss due to ripple in the output of the amplitude stabilization loop that is required for stable sinusoidal oscillations turns out to be a significant contributor to distortion. A four-phase full-wave rectifier combined with second-order ripple filtering minimizes this effect. The filters occupy 11mm2 and consume 65 mW from 5.6 V. The oscillator occupies 8.5 mm2 and consumes 50 mW from 5 V. Measured frequency and amplitude stability over 166 min are 0.95 mHz (17.3 mHz) and 91 μV (45 μ V) at 1 kHz (10 kHz).