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  1. Home
  2. Indian Institute of Technology Madras
  3. Publication5
  4. Guided multilevel approximation of less significant bits for power reduction
 
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Guided multilevel approximation of less significant bits for power reduction

Date Issued
10-10-2017
Author(s)
Celia, D.
Chandrachoodan, Nitin 
Indian Institute of Technology, Madras
DOI
10.1109/ISVDAT.2016.8064879
Abstract
Approximate circuit design has gained significance in recent years targeting applications like media processing where 100% accuracy is not mandatory. Though different approximate adders and multipliers are described in the literature, there is no common approach yet by which many arithmetic circuits can be designed. In this paper we propose a generic technique, guided multilevel approximation, by which most of the basic arithmetic circuits of a media processing application can be built. Basic circuits such as adders, multipliers, filters and multiply-accumulate units are designed using the straight-forward generic technique and power saving ranging from 30% to 75% is obtained with minimum loss of accuracy.
Subjects
  • Approximate

  • arithmetic circuit

  • error

  • guiding circuit

  • low power

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