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Design of a Parasitic Inductance Based Shoot-Through Protection Scheme for SiC MOSFET Gate Driver
Date Issued
01-01-2022
Author(s)
Ghosh, Kousik
Sakthi Sundaram, S.
Saravanan, D.
Indian Institute of Technology, Madras
Mitra, Arunava
Abstract
In this paper, a lossless and fast shoot-through protection technique has been implemented by sensing the voltage drop across the parasitic inductance (L_p) present between the Kelvin and power source terminals of a SiC-MOSFET. This technique eliminates the use of any additional components for sensing and makes the protection rugged and reliable. This paper also presents a detailed analysis of the L_p voltage dependence on device current along with gate driver circuit parameters. The effect on this voltage drop because of the inductance in the gate return and sensing path has also been discussed. Finally, the developed protection scheme has been implemented in a gate driver board for Electric Vehicle (EV) application. It is tested on a 1200V SiC-MOSFET full-bridge power module at 730V DC bus. The experimental results obtained show the fault clearing time to be of 170ns and device current getting limited to 100A during a shoot-through fault at the rated DC bus voltage.