Area and Current Efficient Capacitor-Less Low Drop-Out Regulator Using Time-Based Error Amplifier

An output capacitor-less low drop-out (LDO) regulator using time-based error amplifier is presented in this paper. The proposed LDO utilizes voltage-controlled oscillator (VCO) as an integrator to replace the conventional voltage-based error amplifier. It reduces the overall area by using only 1.2pF of on-chip capacitor while consuming low quiescent current (<30μA at typical corner). Using time as the processing variable, the time-based error amplifier operates with full-swing CMOS digital like signals without introducing any quantization error. The proposed LDO was designed in TSMC 65nm CMOS LP technology with input and output voltages as 1.2 V and 0.8V-1.1V, respectively, achieving a regulation bandwidth of 3MHz. Settling time of 200ns or less was achieved for 10mA load current step and 0-100pF output load capacitor.