Recent advances in insulated gate technology for GaAs and InP MISFETs

In this paper, the present status of the GaAs and InP MISFETs is presented. A detailed discussion on the models for the interface states and their origin is first presented to show that the disordered layer on the semiconductor surface should be etched prior to MIS device formation. The beneficial effects of (NH4)2S x treatment and sulphur passivation are then discussed. A summary of the recent results reported on GaAs and InP MISFETs based on the sulfide treatment are presented indicating their superior characteristics. © 1997 Taylor & Francis Group, LLC.