Comparison of Planar Transformer Architectures and Estimation of Parasitics for High Voltage Low Power DC-DC Converter

Planar Transformers are popularly used over conventional wire wound transformers for its design accuracy, high power density and low parasitics. For high voltage low power (HVLP) flyback converter with high switching frequency feeding a capacitive load, the leakage inductance and self-capacitance of the transformer along with other semiconductor parasitics significantly affect the performance of the converter. Different transformer winding architectures are explored to choose a transformer design with minimum parasitics. In this paper, rectangular winding planar transformer is evaluated for non-interleaved winding architecture and the spiral winding planar transformer for a high voltage low power flyback converter is evaluated for non-interleaved and interleaved winding architectures. The analytical expressions for leakage inductance and self-capacitance are verified using the frequency response analyzer (FRA) and Finite Element Analysis (FEA) simulation results. The difference in the results obtained from analytical, 2D FEA and measurement results are compared. The designed HVLP rectangular and spiral winding PT is fabricated and tested with high voltage flyback converter prototype for 1 kV/5 W. The analytically computed parasitics of the transformer is verified with FEA model and also from the experimentally observed waveforms.