A 14 Bit Dual Channel Incremental Continuous-Time Delta Sigma Modulator for Multiplexed Data Acquisition

CTDSMs operated in the incremental mode can achieve sample-by-sample conversion in a power efficient manner, while relaxing the requirements of the buffer driving the ADC. This work gives simple expressions for quantization and thermal noise of an incremental CTDSM. These are used to design a two channel incremental CTDSM that achieves a bandwidth of 6 6 kHz/channel. The ADC, designed in a 180nm CMOS process, achieves 85.1dB SNDR while consuming 55uW/channel from a 1.8 V supply.