Polycrystalline silicon thin film transistors

In this paper, a brief review of polycrystalline silicon Thin Film Transistors (TFTs) is first presented. This is followed by a presentation of results obtained on the TFTs fabricated on polycrystalline silicon thin films realized on thermally grown silicon dioxide on a silicon substrate by the Low Pressure Chemical Vapour Deposition (LPCVD) process and thermal annealing steps. The effects of deposition pressure and the annealing cycle of the silicon thin films on the TFT performance are presented. It is shown that dramatic improvements in mobilities can be achieved with a two step annealing process when the deposition pressure is 800 mTorr at 550 °C. The results of a detailed study on NH3 and N2O plasma annealing and thermal annealing of the TFTs are also presented to optimize the grain boundary passivation process.