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Auto-Zeroing Static Phase Offset in DLLs Using a Digitally Programmable Sensing Circuit
Date Issued
01-06-2021
Author(s)
Chithra,
Narayanan, Aditya
Kumar, R. S.Ashwin
Indian Institute of Technology, Madras
Abstract
This brief presents a static phase offset (SPO) reduction technique through auto-zeroing in a delay-locked loop (DLL). We propose a self-calibrated, digitally programmable, sensing circuit that can measure both the polarity and the magnitude of the SPO. The SPO is suppressed by tuning a pair of digital-to-time converters (DTCs) at the input of the phase frequency detector (PFD). The proposed technique enables run-time background calibration and can suppress the SPO caused by artifacts from the PFD, charge pump, and loop filter capacitor. Monte Carlo simulation results show that the SPO in a conventional DLL implementation improves from 12.92 ps to 0.90 ps when the proposed auto-zeroing technique is employed.
Volume
68