Nandita DasGupta

A unified model for gate capacitance-voltage characteristics of Si/SiGe heterostructure pMOSFETs is presented. This model is applicable to buried-channel, surface-channel, and dual-channel Si/SiGe heterostructure pMOSFETs. The results from the model are compared with the experimental results and are found to be in excellent agreement. A simple and accurate method for the extraction of parameters such as the valence band offset, Si cap layer thickness, threshold voltages, and substrate doping is also presented in this paper. © 2007 IEEE.

High pressure chemical vapor oxidation of SiC in nitric acid vapor is reported. Higher growth rate at temperatures as low as 400 to 500°C has been achieved. The oxidation kinetics has been studied. It has been observed that the growth rate is strongly dependent on temperature, and the thickness of the oxide increases almost linearly with time within the error limits. X-ray photoelectron spectroscopy (XPS) measurement has been carried out to study the composition of the oxide. Room temperature electrical characterization (current-voltage and capacitance-voltage) has been carried out to estimate the oxide breakdown field strength, oxide charges, and interface state density. It is observed that prolonged oxidation or oxidation at higher temperature in acid ambient deteriorates the quality of oxide. © 2011 The Japan Society of Applied Physics.

Dependence of gate leakage current on Al mole fraction of AlGaN/GaN high-electron mobility transistors (HEMTs) is studied using temperature-dependent current-voltage and capacitance-voltage characteristics. The reverse leakage current is mostly dominated by Poole-Frenkel (PF) emission in the structures used in this brief. However, it is observed that at higher mole fractions, due to higher electric field across the barrier, Fowler-Nordheim (FN) tunneling also contributes to the gate leakage current even at room temperature and above. An expression for critical temperature below which FN tunneling component becomes comparable with or more than PF emission component is presented. It is concluded that the dominant gate leakage mechanisms in III - N HEMTs are dependent on mole fraction of the barrier material and the temperature. However, the relative strengths of PF emission and FN tunneling are also influenced by various process-dependent parameters.

In this article, the effect of charge partitioning in a silicon-on-insulator lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor on its nonlinearity model is investigated. It is found that the prediction of the third-order intermodulation distortion (IM3) depends on the model equivalent circuit (EC) and appropriate charge assignments at various nodes therein. The investigation is carried out using a highly accurate static model of LDMOS along with a couple of different charge-partitioning schemes in order to single out their effects on the nonlinearity model behavior. We observe that charge partitioning in a more flexible EC framework yields an improved IM3 prediction when compared with the TCAD simulated results.

Dielectric materials with permittivity higher than that of SiO2 are becoming increasingly important in ULSI technology as they allow the physical thickness of the gate dielectric to be higher while maintaining the same gate capacitance as in a conventional MOS process. This reduces the gate leakage current, which has become a serious problem in modern MOSFETs with a gate oxide thickness less than 4 nm. In this paper we present the characteristics of MTOS capacitors with a Ta2O5/SiO2 stacked dielectric layer and compare the results with MOS capacitors having an equivalent dielectric thickness. It is shown that the leakage current is considerably smaller and the breakdown voltage significantly higher in the MTOS devices.

MOS capacitors with ultrathin (≅1.2 nm) oxide grown by different techniques have been fabricated on Strained Si/Relaxed SiGe/n-Si substrates with linearly graded SiGe. These techniques involve thermal oxidation, chemical oxidation and both followed by anodic oxidation. Significant improvement in interface states has been obtained when oxidation was followed by anodic oxidation. The leakage currents and reliability characteristics have also shown great improvement. Band gap offsets extracted using a simple and novel technique are found to match well with expected values. © 2007 IEEE.

Rapid Thermal Oxidation (RTO) of AlGaN barrier has been employed to reduce the gate leakage current in AlGaN/GaN High Electron Mobility Transistors. Current Voltage (I-V) and Capacitance Voltage (C-V) characteristics of Schottky Barrier diodes and Metal Oxide Semiconductor diodes are compared. At room temperature, reduction in gate leakage current over an order of magnitude in reverse bias and four orders of magnitude in forward bias is achieved upon oxidation. While the gate current reduces upon RTO, gate capacitance does not change indicating gate control over the channel is not compromised. I-V and C-V characterization have been carried out at different temperatures to get more insight into the device operation.

We have succeeded in growing a stable and ever eluding p-type (Li, Ni): ZnO using a codoping technique. Pulsed laser deposited (PLD) films grown in a small window of oxygen partial pressures (10-3 - 10-2 mbar) showed room temperature carrier density ∼ 2.1 × 10-17 cm-3̇ Ohmic properties of Ni/Au contact on p-ZnO films were studied using LTLM method. Efforts have also been made to grow different nano forms of ZnO and study their optical properties for various device application prospects. © 2010 IEEE.

The paper describes the unified analytical threshold voltage model for non-uniformly doped, dual metal gate (DMG) fully depleted silicon-on-insulator (FDSOI) MOSFETs based on the solution of 2D Poisson's equation. 2D Poisson's equation is solved analytically for appropriate boundary conditions using separation of variables technique. The solution is then extended to obtain the threshold voltage of the FDSOI MOSFET. The model is able to handle any kind of non-uniform doping, viz. vertical, lateral as well as laterally asymetric channel (LAC) profile in the SOI film in addition to the DMG structure. The analytical results are validated with the numerical simulations using the device simulator MEDICI. © 2009 Elsevier Ltd. All rights reserved.

MIS capacitors on nitrided and non-nitrided Ge substrates with HfO 2 as the dielectric have been studied. Effective oxide thickness is found to be reduced after nitridation. Significant improvements in the electrical characteristics are observed for the devices fabricated on nitrided substrates. The value of density of interface states is found to be lower for nitrided device when compared to non-nitrided device. Leakage current is drastically reduced for the nitrided device. The Breakdown field strength is improved from 11.3 MV/cm for the non-nitrided device to 15.89 MV/cm for the nitrided device. © 2007 IEEE.