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Coexistence of Interfacial and Filamentary Resistance Switching in Ti/SiO<inline-formula> <tex-math notation="LaTeX">$_\textit{x}$</tex-math> </inline-formula>/Au Resistive Memory Devices
Date Issued
01-01-2023
Author(s)
Roy, S.
Indian Institute of Technology, Madras
Indian Institute of Technology, Madras
Abstract
Metal-oxide-based resistive random access memory (RRAM) synaptic devices typically suffer from high variability and strongly nonlinear conductance change. In this work, we demonstrate a SiO<inline-formula> <tex-math notation="LaTeX">$_\textit{x}$</tex-math> </inline-formula>-based synapse with low operating voltages, excellent uniformity in the switching operation, and analog tunability of conductance. The devices also exhibit linear and symmetric conductance update. We demonstrate that the enhanced uniformity and analog tunability can be attributed to an interfacial switching mechanism which can be controlled through careful optimization of the device operating conditions.