Signal processing implementation with a dual-bank memory

Fast digital signal processing (DSP) chips often lack facilities for general system control and therefore are used as subsystems in larger workstations. The signal processing capability of the system can be significantly enhanced if the signal processor and host processor are allowed to operate concurrently. This paper presents an implementation of a dual-bank data memory to enable parallel operations of a TMS32010 DSP chip and a 68000 host processor. The multipass fast Fourier transform algorithm is divided into concurrent tasks for these processors. The results presented show an enhancement in processing speed. © 1988.