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  1. Home
  2. Indian Institute of Technology Madras
  3. Publication4
  4. Analysis of the Significant Rise in Breakdown Voltage of GaN HEMTs from Near-Threshold to Deep Off-State Gate Bias Conditions
 
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Analysis of the Significant Rise in Breakdown Voltage of GaN HEMTs from Near-Threshold to Deep Off-State Gate Bias Conditions

Date Issued
01-12-2019
Author(s)
Prasannanjaneyulu, Bhavana
Mishra, Sukalpa
Karmalkar, Shreepad 
Indian Institute of Technology, Madras
DOI
10.1109/TDMR.2019.2950604
Abstract
We investigate AlGaN/GaN high electron mobility transistors with 0.7 \mu \text{m} gate length whose measured off-state breakdown voltage, {V}_{BR} , increased from 28 V at gate-source bias, V_{GS} = - 4.1 V (near threshold, {V}_{T} ) to 87-138 V at \text{V}_{GS} = - 9.5 V (deep off-state); this {V}_{BR} rise was accompanied by a positive {V}_{T} shift of 0.17-0.5 V; devices with larger {V}_{T} shift showed larger {V}_{BR} rise. Our prior work showed that the near-threshold {V}_{BR} is due to space-charge limited current, which is a signature of buffer traps. Our analysis of the above observations of the present work shows the following: The deep off-state {V}_{BR} is due to impact ionization induced avalanche. The correlation between {V}_{T} shift and {V}_{BR} rise implies that barrier and/or buffer traps play a role in governing {V}_{BR}. Although different models involving surface, barrier and buffer traps can simulate the combination of positive {V}_{T} shift and large {V}_{BR} rise, DC electric stress most likely affects the surface and barrier traps but not buffer traps.
Volume
19
Subjects
  • AlGaN/GaN HEMT

  • breakdown voltage

  • electric stress

  • threshold voltage

  • traps

  • virtual gate

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