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  1. Home
  2. Indian Institute of Technology Madras
  3. Publication4
  4. A 265μW Continuous-Time 1-2 MASH ADC Achieving 100.6 dB SNDR in a 24 kHz Bandwidth
 
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A 265μW Continuous-Time 1-2 MASH ADC Achieving 100.6 dB SNDR in a 24 kHz Bandwidth

Date Issued
01-11-2019
Author(s)
Billa, Sujith
Dixit, Suhas
Pavan, Shanthi
DOI
10.1109/A-SSCC47793.2019.9056938
Abstract
We present a high-performance audio CTΔΣM that uses an FIR-filtered 1-2 MASH architecture. The modulator uses a singe-bit first-order input stage that achieves a maximum stable amplitude close to full-scale in spite of using a 1-bit quantizer. We show that FIR feedback can be used to advantage in a MASH converter by effectively filtering the first-stage error that is coupled to the second stage. Our design achieves 100.6 dB peak SNDR in a 24 kHz bandwidth, resulting in a Schreier FoM in excess of 180 dB.
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